programmable frequency synthesizer
英 [ˈprəʊɡræməbl ˈfriːkwənsi ˈsɪnθəsaɪzə(r)]
美 [ˈproʊɡræməbl ˈfriːkwənsi ˈsɪnθəsaɪzər]
【计】可编程序频率合成器
双语例句
- New Digitize Programmable Frequency Synthesizer DDS
新型数字化可编程频率合成器DDS - A programmable divider of frequency synthesizer applied to the 802.11b protocol is presented.
介绍了一种应用于802.11b的频率合成器中的可编程分频器。 - Therefore, we develop the programmable divider which use traditional Phase Lock Loop principle and the frequency synthesizer theory. We utilize the CPLD which is developed by Altera and make use of the VHDL to make the design of kernel programme.
为此，本文研制了程序分频器，它利用了传统锁相环路原理，以及频率合成器的理论，使用Altera公司开发的CPLD，同时使用VHDL硬件描述语言进行核心程序的设计。 - 0.18 μ m CMOS Programmable Frequency Divider for PLL-Based Frequency Synthesizer
0.18μmCMOSPLL频率综合器中可编程分频器的设计与实现 - Use method ( 1) named "the programmable trapping wave", which is merged with frequency spectrum convert in linear, Direct Digit Synthesizer and Surface Acoustic Wave Filter, to open a communication band in jam-band willfully.
使用融合了线性频谱搬移技术、数字频率合成技术以及声表面波滤波技术的可编程陷波法，在干扰频段内任意开辟出通讯频段窗口； - Also, a digital audio frequency programmable frequency synthesizer can be designed with frequency range being controlled to f 0/ 2~ f 0/ 2N for a clock of f 0.
另外，还可设计出一种数字音频程控频率合成器，时钟为f0时，可控频率范围为f02～f02N。 - The use of programmable logic device ( FPGA/ CPLD) to control the microwave frequency synthesizer can achieve the complex and flexible working patterns.
所以利用可编程逻辑器件（FPGA/CPLD）实现对微波频率综合器的控制可以实现复杂灵活的工作模式。